Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11876527 | Error calibration apparatus and method | Wen Li Tang, Shu-Ming Liu, Der-Yu Tsai | 2024-01-16 |
| 11367615 | Method of fabricating transistor with short gate length by two-step photolithography | Yi Chang, Yueh-Chin Lin | 2022-06-21 |
| 11322398 | Process for making interconnect of group III-V semiconductor device, and group III-V semiconductor device including interconnect made thereby | Edward Yi Chang, Yueh-Chin Lin, Ming-Yen Tsai | 2022-05-03 |
| 6001709 | Modified LOCOS isolation process for semiconductor devices | Da-Zen Chuang, Yi Shi | 1999-12-14 |