JC

John F. Croix

NA Nascentric: 5 patents #1 of 2Top 50%
CS Cadence Design Systems: 4 patents #399 of 2,263Top 20%
SM Silicon Metrics: 4 patents #1 of 6Top 20%
AM AMD: 2 patents #3,994 of 9,279Top 45%
Overall (All Time): #325,177 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8275597 High speed memory simulation Chanhee OH, Curtis L. Ratzlaff, Ramon D. Acosta 2012-09-25
8161448 Replicant simulation Aaron Patzer 2012-04-17
8069024 Replicant simulation 2011-11-29
7979820 Temporal replicant simulation Aaron Patzer 2011-07-12
7444604 Apparatus and methods for simulation of electronic circuitry Curtis L. Ratzlaff 2008-10-28
7194716 Apparatus and methods for cell models for timing and power analysis 2007-03-20
7191414 Apparatus and methods for interconnect simulation in electronic circuitry using non-uniform time step 2007-03-13
7065720 Apparatus and methods for current-based models for characterization of electronic circuitry 2006-06-20
7013440 Apparatus and methods for interconnect characterization in electronic circuitry 2006-03-14
6931634 Encrypted compiler 2005-08-16
6862600 Rapid parameter passing between multiple program portions for efficient procedural interaction with minimum calls and/or call backs Robert Gonzalez 2005-03-01
6766506 Interconnect model compiler Curtis L. Ratzlaff, Robert B. Jones 2004-07-20
6327557 Method and system for creating electronic circuitry 2001-12-04
6324671 Using a reduced cell library for preliminary synthesis to evaluate design Richard L. Ratzel, Stephen R. King 2001-11-27
5956497 Methodology for designing an integrated circuit using a reduced cell library for preliminary synthesis Richard L. Ratzel, Stephen R. King 1999-09-21