VG

Vivek Gopalan

NT Nanya Technology: 3 patents #232 of 775Top 30%
📍 Boise, ID: #1,591 of 3,546 inventorsTop 45%
🗺 Idaho: #3,046 of 8,810 inventorsTop 35%
Overall (All Time): #1,493,057 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
9653401 Method for forming buried conductive line and structure of buried conductive line 2017-05-16
9147604 Memory process Robert L. Kerr, Hung-Ming Tsai 2015-09-29
9123784 Memory process and memory structure made thereby Robert L. Kerr, Hung-Ming Tsai 2015-09-01