KH

Kuen-Chy Heo

NT Nanya Technology: 4 patents #182 of 775Top 25%
Overall (All Time): #1,266,476 of 4,157,543Top 35%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6781181 Layout of a folded bitline DRAM with a borderless bitline Jeng-Ping Lin 2004-08-24
6534359 Method of fabricating memory cell Jeng-Ping Lin 2003-03-18
6432774 Method of fabricating memory cell with trench capacitor and vertical transistor Jeng-Ping Lin 2002-08-13
6355529 Method of fabricating memory cell with vertical transistor Jeng-Ping Lin 2002-03-12