Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5798937 | Method and apparatus for forming redundant vias between conductive layers of an integrated circuit | Gabriel Bracha, Eytan Weissberger, Ilan Algor | 1998-08-25 |
| 5483476 | Mantissa addition system for a floating point adder | Yoram Horen, Alick Einav | 1996-01-09 |
| 5408427 | Detection of exponent underflow and overflow in a floating point adder | Alick Einaj, Yoram Horen | 1995-04-18 |
| 5327103 | Lock detection circuit for a phase lock loop | Nathan Baron, Judah L. Adelman | 1994-07-05 |