OY

Oded Yishay

Motorola: 13 patents #622 of 12,470Top 5%
FS Freeescale Semiconductor: 1 patents #2,021 of 3,767Top 55%
NU Nxp Usa: 1 patents #1,089 of 2,066Top 55%
Overall (All Time): #318,702 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11165482 Efficient engine and algorithm for control and data multiplexing/demultiplexing in 5G NR devices Jayakrishnan C. Mundarath, Ahmed ElSamadouny 2021-11-02
9087003 Vector NCO and twiddle factor generator Leo G. Dehner 2015-07-21
5748490 Low power logic minimization for electrical circuits J. Greg Viot 1998-05-05
5717851 Breakpoint detection circuit in a data processor and method therefor Joseph Jelemensky 1998-02-10
5704039 Mask programmable security system for a data processor and method therefor William P. LaViolette, Daniel W. Pechonis 1997-12-30
5664168 Method and apparatus in a data processing system for selectively inserting bus cycle idle time Ann E. Harwood, Chinh H. Le 1997-09-02
5651122 Pipelined data processor that detects an illegal instruction by detecting legal instruction operation codes Eytan Hartung, James G. Viot 1997-07-22
5623687 Reset configuration in a data processing system and method therefor Joseph Jelemensky, Jeffrey D. Quinn, Daniel W. Pechonis 1997-04-22
5606715 Flexible reset configuration of a data processing system and method therefor Daniel W. Pechonis, Joseph Jelemensky 1997-02-25
5574894 Integrated circuit data processor which provides external sensibility of internal signals during reset Alexander L. Iles, Joseph Jelemensky 1996-11-12
5566322 Method and apparatus for performing read accesses from a counter which avoid large rollover error when multiple read access cycles are used Daniel W. Pechonis, Joseph Jelemensky, John B. Waite 1996-10-15
5548794 Data processor and method for providing show cycles on a fast multiplexed bus Joseph Jelemensky, Alexander L. Iles 1996-08-20
5483660 Method and apparatus for performing multiplexed and non-multiplexed bus cycles in a data processing system Joseph Jelemensky, Ann E. Harwood, Javier Saldana 1996-01-09
5414714 Method and apparatus for scan testing an array in a data processing system Michael E. Gladden, Robert J. Skruhak, Eytan Hartung 1995-05-09
5257357 Method and apparatus for implementing a priority adjustment of an interrupt in a data processor Eytan Hartung, David Shamir 1993-10-26