NC

Nicholas G. Cafaro

Motorola: 10 patents #938 of 12,470Top 8%
MS Motorola Solutions: 6 patents #248 of 2,212Top 15%
📍 Chicago, IL: #690 of 13,327 inventorsTop 6%
🗺 Illinois: #5,138 of 84,256 inventorsTop 7%
Overall (All Time): #285,989 of 4,157,543Top 7%
16
Patents All Time

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDate
12353204 System, device and method for controlling an uncrewed aerial vehicle at public safety incidents Joseph C. Namm, Melanie A. King, Jimmy Zong 2025-07-08
11387859 Method and apparatus for mitigating image interference in a receiver Sumit Talwalkar, Geetha B. Nagaraj 2022-07-12
10439850 System and method for processing radiofrequency signals using modulation duty cycle scaling Joseph P. Heck, Christopher Calvo, Rodger W. Caruthers, Geetha B. Nagaraj, Raul Salvi 2019-10-08
9564880 Systems and methods for generating injection-locked, frequency-multiplied output signals Robert E. Stengel 2017-02-07
8427205 Method and apparatus for fast frequency locking in a closed loop based frequency synthesizer Geetha B. Nagaraj, Robert E. Stengel, Sumit Talwalkar 2013-04-23
8339295 Method and system for managing digital to time conversion Geetha B. Nagaraj, Ralf Hekmann, Robert E. Stengel, Scott G. Miller 2012-12-25
7773713 Clock data recovery systems and methods for direct digital synthesizers Robert E. Stengel 2010-08-10
7620133 Method and apparatus for a digital-to-phase converter Thomas L. Gradishar, Robert E. Stengel 2009-11-17
7570096 Direct digital synthesizer with variable reference for improved spurious performance Thomas L. Gradishar, Robert E. Stengel 2009-08-04
7315215 Direct digital synthesizer with variable reference for improved spurious performance Thomas L. Gradishar, Robert E. Stengel 2008-01-01
7251468 Dynamically matched mixer system with improved in-phase and quadrature (I/Q) balance and second order intercept point (IP2) performance Charles R. Ruelke, Robert E. Stengel 2007-07-31
7114069 Reconfigurable processing circuit including a delay locked loop multiple frequency generator for generating a plurality of clock signals which are configured in frequency by a control processor Andrew Tomerlin, Robert E. Stengel 2006-09-26
7031372 Multiple user reconfigurable CDMA processor Andrew Tomerlin, Robert E. Stengel 2006-04-18
6959397 Programmable skew clock signal generator selecting one of a plurality of delayed reference clock signals in response to a phase accumulator output Robert E. Stengel 2005-10-25
6897687 Method and apparatus for reconfigurable frequency generation Robert E. Stengel 2005-05-24
6674329 Distributed RF amplifier with filtered dummy load Robert E. Stengel 2004-01-06