Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9152496 | High performance flash channel interface | Ravindra K. Kanade, Gregory A. Racino | 2015-10-06 |
| 7475237 | Timer with periodic channel service | Brian F. Wilkie, Jay Quirk | 2009-01-06 |
| 5708839 | Method and apparatus for providing bus protocol simulation | Michael G. Gallup, Erik L. Welty | 1998-01-13 |
| 5603046 | Method for complex data movement in a multi-processor data processing system | Meltin Bell, Michael G. Gallup, L. Rodney Goke, Jack R. Davis, Erik L. Welty | 1997-02-11 |
| 5548771 | Multi-processor data processing system having multiple ports coupled to multiple interface circuits | Jack R. Davis, Michael G. Gallup, L. Rodney Goke, Erik L. Welty | 1996-08-20 |
| 4432049 | Programmable mode select by reset | Pern Shaw, Donald L. Tietjen | 1984-02-14 |
| 4409671 | Data processor having single clock pin | R. Gary Daniels, Thomas H. Bennett, Fuad H. Musa | 1983-10-11 |
| 4330842 | Valid memory address pin elimination | R. Gary Daniels, Thomas H. Bennett | 1982-05-18 |
| 4314353 | On chip ram interconnect to MPU bus | Thomas G. Gunter, Fuad H. Musa, Wm. B. Wilder, Jr. | 1982-02-02 |
| 4266270 | Microprocessor having plural internal data buses | R. Gary Daniels, Fuad H. Musa, William Blair Wilder, Thomas H. Bennett | 1981-05-05 |
| 4263650 | Digital data processing system with interface adaptor having programmable, monitorable control register therein | Thomas H. Bennett, Earl F. Carlow, Edward C. Hepworth, Wilbur L. Mathys, William D. Mensch, Jr. +2 more | 1981-04-21 |
| 4218740 | Interface adaptor architecture | Thomas H. Bennett, Earl F. Carlow, Edward C. Hepworth, William D. Mensch, Jr., Charles I. Peddle +1 more | 1980-08-19 |
| 4203157 | Carry anticipator circuit and method | R. Gary Daniels, Fuad H. Musa, W. Bryant Wilder, Jr., Thomas H. Bennett | 1980-05-13 |