Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9445252 | Method and apparatus for providing services to a geographic area | Philip E. May, Michael D. Pearce | 2016-09-13 |
| 9332413 | Method and apparatus for providing services to a geographic area | Philip E. May, Michael D. Pearce | 2016-05-03 |
| 8116327 | Communications network and management arbitrator | S. David Silk, David A. Hume | 2012-02-14 |
| 7945768 | Method and apparatus for nested instruction looping using implicit predicates | Raymond B. Essick, IV, Kent D. Moat | 2011-05-17 |
| 7533231 | Method and circuit for increasing the memory access speed of an enhanced synchronous memory | Kenneth J. Mobley, Michael T. Peters | 2009-05-12 |
| 7502909 | Memory address generation with non-harmonic indexing | Kent D. Moat, Raymond B. Essick, IV | 2009-03-10 |
| 7159099 | Streaming vector processor with reconfigurable interconnection switch | Brian G. Lucas, Philip E. May, Kent D. Moat, Raymond B. Essick, IV, Silviu Chiricescu +2 more | 2007-01-02 |
| 7140019 | Scheduler of program instructions for streaming vector processor having interconnected functional units | Philip E. May, Kent D. Moat, Raymond B. Essick, IV, Silviu Chiricescu, Brian G. Lucas +2 more | 2006-11-21 |
| 6934938 | Method of programming linear graphs for streaming vector computation | Philip E. May, Kent D. Moat, Raymond B. Essick, IV, Silviu Chiricescu, Brian G. Lucas +2 more | 2005-08-23 |
| 6813679 | Method and circuit for increasing the memory access speed of an enhanced synchronous SDRAM | Kenneth J. Mobley, Michael T. Peters | 2004-11-02 |
| 6799261 | Memory interface with fractional addressing | Philip E. May, Kent D. Moat, Raymond B. Essick, IV, Silviu Chiricescu, Brian Jeffrey Lucas +2 more | 2004-09-28 |