Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6058449 | Fault tolerant serial arbitration system | Daniel A. Linzmeier | 2000-05-02 |
| 5909558 | Low power serial arbitration system | Daniel A. Linzmeier | 1999-06-01 |
| 5845098 | Address lines load reduction | David Galanti, Eitan Zmora, Natan Baron | 1998-12-01 |
| 5479445 | Mode dependent serial transmission of digital audio information | Thomas L. Wernimont | 1995-12-26 |
| 5359626 | Serial interface bus system for transmitting and receiving digital audio information | Thomas L. Wernimont, Clif Liu | 1994-10-25 |
| 5278874 | Phase lock loop frequency correction circuit | Clif Liu, Thomas L. Wernimont | 1994-01-11 |
| 5258999 | Circuit and method for receiving and transmitting control and status information | Thomas L. Wernimont, Clif Liu | 1993-11-02 |
| 5214705 | Circuit and method for communicating digital audio information | Thomas L. Wernimont | 1993-05-25 |
| 4744043 | Data processor execution unit which receives data with reduced instruction overhead | — | 1988-05-10 |
| 4742479 | Modulo arithmetic unit having arbitrary offset and modulo values | Miles Posen | 1988-05-03 |
| 4723288 | Stereo decoding by direct time sampling | David E. Borth, James J. Mikulski | 1988-02-02 |
| 4713790 | Exclusive OR/NOR gate having cross-coupled transistors | Ronald H. Cieslak | 1987-12-15 |
| 4709324 | Data processor control unit having an interrupt service using instruction prefetch redirection | — | 1987-11-24 |
| 4652997 | Method and apparatus for minimizing overhead when executing nested do loops | — | 1987-03-24 |
| 4575812 | X.times.Y Bit array multiplier/accumulator circuit | Ronald H. Cieslak | 1986-03-11 |
| 4539684 | Automatic frame synchronization recovery utilizing a sequential decoder | — | 1985-09-03 |
| 4309772 | Soft quantizer for FM radio binary digital signaling | James Anthony Pautler | 1982-01-05 |