Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9448575 | Bipolar transistor adjustable shunt regulator circuit | Isaac Terasuth Ko | 2016-09-20 |
| 8704569 | Delay locked loop circuit and method | Dieter Haerle, Peter Vlasenko | 2014-04-22 |
| 8503598 | Initialization circuit for delay locked loop | — | 2013-08-06 |
| RE43947 | Delay locked loop circuit and method | Dieter Haerle, Peter Vlasenko | 2013-01-29 |
| 8218707 | Intialization circuit for delay locked loop | — | 2012-07-10 |
| 8035434 | Simplified bias circuitry for differential buffer stage with symmetric loads | — | 2011-10-11 |
| 7761831 | ASIC design using clock and power grid standard cell | Bruce Millar, Susan Coleman, Seanna Pike | 2010-07-20 |
| 7705642 | Simplified bias circuitry for differential buffer stage with symmetric loads | — | 2010-04-27 |
| 7656988 | Start up circuit for delay locked loop | — | 2010-02-02 |
| 7532050 | Delay locked loop circuit and method | Dieter Haerle, Peter Vlasenko | 2009-05-12 |
| 7477716 | Start up circuit for delay locked loop | — | 2009-01-13 |
| 7285997 | Delay locked loop circuit and method | Dieter Haerle, Peter Vlasenko | 2007-10-23 |
| 7190201 | Method and apparatus for initializing a delay locked loop | Dieter Haerle, Peter Vlasenko | 2007-03-13 |