Issued Patents All Time
Showing 51–61 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5255232 | DRAM cell plate and precharge voltage generator | Valerie L. Lines | 1993-10-19 |
| 5245576 | Dynamic memory row/column redundancy scheme | Valerie L. Lines, Akira Yoneyama | 1993-09-14 |
| 5233560 | Dynamic memory bit line precharge scheme | Akira Yoneyama | 1993-08-03 |
| 5093808 | Folded bitline dynamic RAM with reduced shared supply voltages | — | 1992-03-03 |
| 5042012 | Serial access dynamic ram | — | 1991-08-20 |
| 5027329 | Addressing for large dynamic RAM | — | 1991-06-25 |
| 5014244 | Integrated memory circuit with parallel and serial input and output | Judocus A. M. Lammerts, Roelof H. W. Salters | 1991-05-07 |
| 4980862 | Folded bitline dynamic ram with reduced shared supply voltages | — | 1990-12-25 |
| 4789796 | Output buffer having sequentially-switched output | — | 1988-12-06 |
| 4786830 | CMOS input buffer circuit for TTL signals | — | 1988-11-22 |
| 4367420 | Dynamic logic circuits operating in a differential mode for array processing | Philip Merrick Thompson | 1983-01-04 |