Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6070232 | Cache controller fault tolerant computer and data transfer system setting recovery points | Hitoshi Ishida, Minoru Shiga, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki | 2000-05-30 |
| 5829030 | System for performing cache flush transactions from interconnected processor modules to paired memory modules | Hitoshi Ishida, Minoru Shiga, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki | 1998-10-27 |
| 5812757 | Processing board, a computer, and a fault recovery method for the computer | Hiromu Okamoto, Takashi Tanabe, Kaoru Abe, Tsugihiko Ohno, Toshihisa Kamemaru +3 more | 1998-09-22 |
| 5749091 | Cache controller with index stack for coherency fault tolerance | Hitoshi Ishida, Minoru Shiga, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki | 1998-05-05 |
| 5577199 | Majority circuit, a controller and a majority LSI | Takashi Tanabe, Toshihisa Kamemaru, Mamoru Katoh, Tsugihiko Ohno, Kaoru Abe | 1996-11-19 |
| 5481670 | Method and apparatus for backup in a multi-memory device | Motoharu Taura, Toshihiko Shimizu, Hiroshi Umeoka | 1996-01-02 |