Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5875114 | Interconnect delay calculation apparatus and path delay value verification apparatus for designing semiconductor integrated circuit and circuit model data storage device | Tatsuji Kagatani | 1999-02-23 |
| 5819205 | Signal delay computing method | — | 1998-10-06 |
