Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11807596 | Thiol compounds, synthesis method therefor, and utilization of said thiol compounds | Akihito Otsuka, Takeshi KUMANO, Kazuyuki Fujikawa, Yusuke Araki | 2023-11-07 |
| 11773207 | Thiol compound, method for synthesizing same, and uses for said thiol compound | Yusuke Araki, Takeshi KUMANO | 2023-10-03 |
| 11438505 | Imaging apparatus and control method | Takumi Tsuchiya | 2022-09-06 |
| 10913731 | Epoxy-oxetane compound, method for synthesizing same, and use of said compound | Kazunori Aoki, Takashi KASHIWABARA, Yusuke Araki, Akihito Otsuka, Takeshi KUMANO | 2021-02-09 |
| 10550131 | Mercaptoethylglycol uril compound and utilization thereof | Akikazu Matsuda, Takeshi KUMANO | 2020-02-04 |
| 10246550 | Resin composition | Kazuki Iwaya, Fuminori Arai, Akikazu Matsuda, Takeshi KUMANO | 2019-04-02 |
| 9688704 | Azole silane compound, surface treatment solution, surface treatment method, and use thereof | Shozo Miura, Takayuki Murai, Miya Tanioka, Masato KATSUMURA, Noriaki Yamaji | 2017-06-27 |
| 6566909 | Integrated circuit device including CMOS tri-state drivers suitable for powerdown | — | 2003-05-20 |
| 6292025 | Integrated circuit device including CMOS tri-state drivers suitable for powerdown | — | 2001-09-18 |
| 6272583 | Microprocessor having built-in DRAM and internal data transfer paths wider and faster than independent external transfer paths | Mamoru Sakugawa, Hiroyuki Kondo | 2001-08-07 |
| 6157973 | Microcomputer having memory and processor formed on the same chip to increase the rate of information transfer | Jun Ohtani, Akira Yamazaki | 2000-12-05 |
| 6130852 | Memory integrated circuit device including a memory having a configuration suitable for mixture with logic | Jun Ohtani, Akira Yamazaki, Takashi Higuchi | 2000-10-10 |
| 6107830 | Integrated circuit device including CMOS tri-state drivers suitable for powerdown | — | 2000-08-22 |
| 5983367 | Microprocessor having a CPU and at least two memory cell arrays on the same semiconductor chip, including a shared sense amplifier | Takashi Higuchi, Hideo Tsubota | 1999-11-09 |
| 5974493 | Microcomputer with processor bus having smaller width than memory bus | Katsumi Dosaka, Yukari Takata | 1999-10-26 |