HS

Hisakazu Sato

Mitsubishi Electric: 9 patents #3,275 of 25,717Top 15%
RT Renesas Technology: 5 patents #592 of 3,337Top 20%
📍 Itami, JP: #221 of 1,436 inventorsTop 20%
Overall (All Time): #354,490 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
7694109 Data processing apparatus of high speed process using memory of low speed and low power consumption Toyohiko Yoshida, Akira Yamada 2010-04-06
7581054 Data processing system Kesami Hagiwara, Takeshi Kataoka, Shunichi Iwata, Yoshikazu Kiyoshige, Akihiko Tomita 2009-08-25
7346760 Data processing apparatus of high speed process using memory of low speed and low power consumption Toyohiko Yoshida, Akira Yamada 2008-03-18
7162585 Semiconductor memory device storing part of program designated by programmer, and software development apparatus for system using the same Isao Minematsu 2007-01-09
6779098 Data processing device capable of reading and writing of double precision data in one cycle Isao Minematsu 2004-08-17
6615339 VLIW processor accepting branching to any instruction in an instruction word set to be executed consecutively Hironobu Ito 2003-09-02
6560697 Data processor having repeat instruction processing using executed instruction number counter 2003-05-06
6553474 Data processor changing an alignment of loaded data Hironobu Ito 2003-04-22
6389524 Decoding device with associative memory permitting variable-length keyword comparisons 2002-05-14
6345357 Versatile branch-less sequence control of instruction stream containing step repeat loop block using executed instructions number counter 2002-02-05
6144322 Variable length code processor with encoding and/or decoding 2000-11-07
5359720 Taken storage apparatus using a hash memory and a cam Toshiyuki Tamura, Masaki Fujita, Shinji Komori, Hidehiro Takata 1994-10-25
5280597 Pipeline processor with self timed data transfer Hidehiro Takata, Yoshihiro Seguchi, Shinji Komori 1994-01-18
5182799 Retrieving data using hash memory address generated by reversing /xor bits of selected bit strings of an input packet id Toshiyuki Tamura, Masaki Fujita, Shinji Komori, Hidehiro Takata 1993-01-26