Issued Patents All Time
Showing 51–75 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10963367 | Program tracing for time travel debugging and analysis | — | 2021-03-30 |
| 10956304 | Dynamic diagnostic code instrumentation over a historic program execution | Jackson Davis, Patrick Lothian Nelson, Andrew R. Sterland, Del Myers, Leslie Yvette Richardson +1 more | 2021-03-23 |
| 10949332 | Data race analysis based on altering function internal loads during time-travel debugging | — | 2021-03-16 |
| 10922210 | Automatic software behavior identification using execution record | Leslie Yvette Richardson, Jackson Davis, Del Myers, Thomas Lai, Andrew R. Sterland +1 more | 2021-02-16 |
| 10877873 | Using historic execution data to visualize tracepoints | Leslie Yvette Richardson, Jackson Davis, Thomas Lai, Del Myers, Patrick Lothian Nelson +4 more | 2020-12-29 |
| 10860485 | Leveraging existing logic paths during bit-accurate processor tracing | — | 2020-12-08 |
| 10853224 | Indexing and searching a time-travel trace for arbitrary length/arbitrary alignment values | — | 2020-12-01 |
| 10846199 | Protecting sensitive information in time travel trace debugging | Henry Gabryjelski, Jackson Davis | 2020-11-24 |
| 10802946 | Presenting differences between code entity invocations | — | 2020-10-13 |
| 10754758 | Indexing time-travel traces | Juan Carlos Arevalo Baeza, Darek Josip Michocka | 2020-08-25 |
| 10747645 | Selectively tracing portions of computer process execution | Del Myers, Jackson Davis, Thomas Lai, Patrick Lothian Nelson, Juan Carlos Arevalo Baeza | 2020-08-18 |
| 10740219 | Selectively tracing portions of computer process execution | Del Myers, Thomas Lai, Patrick Lothian Nelson, Juan Carlos Arevalo Baeza, Stephen H. Toub | 2020-08-11 |
| 10740220 | Cache-based trace replay breakpoints using reserved tag field bits | — | 2020-08-11 |
| 10698792 | Execution control with cross-level trace mapping | Patrick Lothian Nelson, Jackson Davis, Del Myers, Thomas Lai, Deborah Chen +1 more | 2020-06-30 |
| 10684835 | Improving emulation and tracing performance using compiler-generated emulation optimization metadata | — | 2020-06-16 |
| 10671512 | Processor memory reordering hints in a bit-accurate trace | — | 2020-06-02 |
| 10642737 | Logging cache influxes by request to a higher-level cache | Henry Gabryjelski | 2020-05-05 |
| 10599541 | Efficient breakpoint detection via caches | — | 2020-03-24 |
| 10592396 | Memory validity states in time-travel debugging | Henry Gabryjelski, Jackson Davis, Patrick Lothian Nelson, Del Myers, Thomas Lai | 2020-03-17 |
| 10565087 | Tentative execution of code in a debugger | — | 2020-02-18 |
| 10558572 | Decoupling trace data streams using cache coherence protocol data | — | 2020-02-11 |
| 10540250 | Reducing storage requirements for storing memory addresses and values | — | 2020-01-21 |
| 10541042 | Level-crossing memory trace inspection queries | Patrick Lothian Nelson, Jackson Davis, Del Myers, Thomas Lai, Deborah Chen +1 more | 2020-01-21 |
| 10514969 | Bit-accurate-tracing analysis with applied memory region lifetimes | Henry Gabryjelski | 2019-12-24 |
| 10496537 | Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache | — | 2019-12-03 |