Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12118057 | Computing partial matrices at hardware accelerator | Nitin N. Garegrat, Timothy H. Heil, Balamurugan Kulanthivelu Veluchamy | 2024-10-15 |
| 12079301 | Performing tensor operations using a programmable control engine | Nitin N. Garegrat, Shankar Narayan, Sujatha Santhanaraman, Jayadev Velagandula | 2024-09-03 |
| 11960338 | Activity smoothener circuit controlling rates of change of localized processing activity in an integrated circuit (IC), and related methods | Smitha L. RAPAKA, Xiaoling Xu | 2024-04-16 |
| 11822414 | Processor-based system employing configurable local frequency throttling management to manage power demand and consumption, and related methods | Smitha L. RAPAKA, Xiaoling Xu, Venkatesh Balasubramanian, Sunil K. Vemula, Cesar Maldonado | 2023-11-21 |
| 11748251 | Storing tensors in memory based on depth | Nitin N. Garegrat, Shankar Narayan | 2023-09-05 |
| 11234023 | Features of range asymmetric number system encoding and decoding | Sudharsan GOPALAKRISHNAN, Shaileshkumar D. KUMBHANI, Hsu-Kuei LIN | 2022-01-25 |
| 10768861 | In-place safe decompression | Xin Huang, Bartosz T. Nyczkowski, Michael Sterling | 2020-09-08 |
| 10691361 | Multi-format pipelined hardware decompressor | Robert W. Havlik, Michael Erickson, Amar S. Vattakandy | 2020-06-23 |
| 10489159 | Pipelined decompression of sliding window compressed data | Amar S. Vattakandy, Michael Erickson, Robert W. Havlik | 2019-11-26 |
| 9819359 | Multi-symbol, multi-format, parallel symbol decoder for hardware decompression engines | Robert W. Havlik, Michael Erickson, Amar S. Vattakandy | 2017-11-14 |
| 9787323 | Huffman tree decompression | Robert W. Havlik, Michael Erickson, Amar S. Vattakandy | 2017-10-10 |
| 8024394 | Dual mode floating point multiply accumulate unit | Boris Prokopenko, Timour Paltashev | 2011-09-20 |
| 7675521 | Method and apparatus for triangle rasterization with clipping and wire-frame mode support | Konstantine Iourcha, Boris Prokopenko, Timour Paltashev | 2010-03-09 |
| 7551174 | Method and apparatus for triangle rasterization with clipping and wire-frame mode support | Konstantine Iourcha, Boris Prokopenko, Timour Paltashev | 2009-06-23 |
| 7246218 | Systems for increasing register addressing space in instruction-width limited processors | Boris Prokopenko, Timour Paltashev | 2007-07-17 |
| 7159003 | Method and apparatus for generating sign-digit format of sum of two numbers | Boris Prokopenko, Timour Paltashev | 2007-01-02 |
| 7146486 | SIMD processor with scalar arithmetic logic units | Boris Prokopenko, Timour Paltashev | 2006-12-05 |
| 7098924 | Method and programmable device for triangle interpolation in homogeneous space | Boris Prokopenko, Timour Paltashev | 2006-08-29 |