Issued Patents All Time
Showing 76–100 of 113 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7336548 | Clock generating circuit with multiple modes of operation | — | 2008-02-26 |
| 7287143 | Synchronous memory device having advanced data align circuit | Young-Jin Yoon | 2007-10-23 |
| 7274236 | Variable delay line with multiple hierarchy | — | 2007-09-25 |
| 7269094 | Memory system and method for strobing data, command and address signals | Feng Lin, Brent Keeth, Brian Johnson | 2007-09-11 |
| 7251194 | Memory system and method for strobing data, command and address signals | Feng Lin, Brent Keeth, Brian Johnson | 2007-07-31 |
| 7245553 | Memory system and method for strobing data, command and address signals | Feng Lin, Brent Keeth, Brian Johnson | 2007-07-17 |
| 7230495 | Phase-locked loop circuits with reduced lock time | Feng Lin | 2007-06-12 |
| 7230875 | Delay locked loop for use in synchronous dynamic random access memory | — | 2007-06-12 |
| 7187617 | Memory system and method for strobing data, command and address signals | Feng Lin, Brent Keeth, Brian Johnson | 2007-03-06 |
| 7173463 | Generating multi-phase clock signals using hierarchical delays | — | 2007-02-06 |
| 7161394 | Digital phase mixers with enhanced speed | — | 2007-01-09 |
| 7129761 | Digital delay-locked loop circuits with hierarchical delay adjustment | — | 2006-10-31 |
| 7130226 | Clock generating circuit with multiple modes of operation | — | 2006-10-31 |
| 7126874 | Memory system and method for strobing data, command and address signals | Feng Lin, Brent Keeth, Brian Johnson | 2006-10-24 |
| 7095261 | Clock capture in clock synchronization circuitry | Adrian J. Drexler, Debra M. Bell, Tyler Gomm | 2006-08-22 |
| 7009434 | Generating multi-phase clock signals using hierarchical delays | — | 2006-03-07 |
| 6982578 | Digital delay-locked loop circuits with hierarchical delay adjustment | — | 2006-01-03 |
| 6982579 | Digital frequency-multiplying DLLs | — | 2006-01-03 |
| 6963235 | Delay locked loop circuit with duty cycle correction function | — | 2005-11-08 |
| 6956418 | Delay locked loop device | Jong-Tae Kwak | 2005-10-18 |
| 6952127 | Digital phase mixers with enhanced speed | — | 2005-10-04 |
| 6919745 | Ring-resister controlled DLL with fine delay line and direct skew sensing detector | Jun H. Ahn, Joo S. Choi | 2005-07-19 |
| 6914798 | Register controlled DLL for reducing current consumption | Ki-Seop Kwon | 2005-07-05 |
| 6853226 | Register controlled delay locked loop having an acceleration mode | Jong-Tae Kwak | 2005-02-08 |
| 6853225 | Delay locked loop circuit with duty cycle correction function | — | 2005-02-08 |