Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8074113 | System and method for data protection against power failure during sector remapping | Murthy Kompella, Narayan Ayalasomayajula | 2011-12-06 |
| 8046533 | System and method for sector remapping | Murthy Kompella, Narayan Ayalasomayajula | 2011-10-25 |
| 8006046 | Integrated-circuit implementation of a storage-shelf router and a path controller card for combined use in high-availability mass-storage-device shelves and that support virtual disk formatting | Murthy Kompella, Matthew Paul Wakeley | 2011-08-23 |
| 7801120 | Method and system for efficient queue management | Narayan Ayalasomayajula, Murthy Kompella | 2010-09-21 |
| 7634614 | Integrated-circuit implementation of a storage-shelf router and a path controller card for combined use in high-availability mass-storage-device shelves and that support virtual disk formatting | Murthy Kompella, Matthew Paul Wakeley | 2009-12-15 |
| 7353321 | Integrated-circuit implementation of a storage-shelf router and a path controller card for combined use in high-availability mass-storage-device shelves that may be incorporated within disk arrays | Murthy Kompella, Matthew Paul Wakeley, Jeffrey Douglas Scotten | 2008-04-01 |
| 7320084 | Management of error conditions in high-availability mass-storage-device shelves by storage-shelf routers | Murthy Kompella, Matthew Paul Wakeley | 2008-01-15 |
| 7167929 | Integrated-circuit implementation of a storage-shelf router and a path controller card for combined use in high-availability mass-storage-device shelves that may be incorporated within disk arrays, and a storage-shelf-interface tunneling method and system | Murthy Kompella, Matthew Paul Wakeley | 2007-01-23 |
| 6978457 | Method and system increasing performance substituting finite state machine control with hardware-implemented data structure manipulation | Manraj Singh Johl, Matthew Paul Wakeley | 2005-12-20 |
| 6791989 | Fibre channel interface controller that performs non-blocking output and input of fibre channel data frames and acknowledgement frames to and from a fibre channel | Matthew Paul Wakeley | 2004-09-14 |
| 6578096 | Method and system for efficient I/O operation completion in a fibre channel node | Matthew Paul Wakeley | 2003-06-10 |
| 6526458 | METHOD AND SYSTEM FOR EFFICIENT I/O OPERATION COMPLETION IN A FIBRE CHANNEL NODE USING AN APPLICATION SPECIFIC INTEGRATION CIRCUIT AND DETERMINING I/O OPERATION COMPLETION STATUS WITHIN INTERFACE CONTROLLER | Matthew Paul Wakeley, Murthy Kompella, Bryan John Cowger | 2003-02-25 |
| 6425034 | Fibre channel controller having both inbound and outbound control units for simultaneously processing both multiple inbound and outbound sequences | Matthew Paul Wakeley, Bryan John Cowger, Michael Ivan Thompson | 2002-07-23 |
| 6336157 | Deterministic error notification and event reordering mechanism provide a host processor to access complete state information of an interface controller for efficient error recovery | Catherine H Carbonaro, Matthew Paul Wakeley | 2002-01-01 |
| 6314477 | Performance of fibre channel protocol sequence reassembly using expected frame information and buffer list calculations | Bryan John Cowger, Brandon H Mathew, Matthew Paul Wakeley | 2001-11-06 |
| 6208703 | First-in-first-out synchronizer | Vincente V. Cavanna | 2001-03-27 |
| 6055588 | Single stage FIFO memory with a circuit enabling memory to be read from and written to during a single cycle from a single clock | Vicente V. Cavanna | 2000-04-25 |
| 5809521 | Single and multistage stage fifo designs for data transfer synchronizers | Vicente V. Cavanna | 1998-09-15 |