Issued Patents All Time
Showing 26–50 of 114 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8508285 | Analog delay lines and adaptive biasing | — | 2013-08-13 |
| 8392744 | Clock distribution apparatus, systems, and methods | — | 2013-03-05 |
| 8330508 | Phase-generation circuitry with duty-cycle correction and method for generating a multiphase signal | Roman A. Royer | 2012-12-11 |
| 8305120 | Delay locked loop circuit and method | — | 2012-11-06 |
| 8289062 | Analog delay lines and adaptive biasing | — | 2012-10-16 |
| 8289059 | Circuits and methods for clock signal duty-cycle correction | — | 2012-10-16 |
| 8278993 | Clock distribution network | — | 2012-10-02 |
| 8183901 | Delay locked loop circuit and method | — | 2012-05-22 |
| 8081020 | Delay-lock loop and method adapting itself to operate over a wide frequency range | — | 2011-12-20 |
| 8072838 | Control voltage tracking circuits, methods for recording a control voltage for a clock synchronization circuit and methods for setting a voltage controlled delay | — | 2011-12-06 |
| 8032778 | Clock distribution apparatus, systems, and methods | — | 2011-10-04 |
| 8026750 | Delay locked loop circuit and method | — | 2011-09-27 |
| 8001410 | Efficient clocking scheme for ultra high-speed systems | — | 2011-08-16 |
| 7999589 | Circuits and methods for clock signal duty-cycle correction | — | 2011-08-16 |
| 7961019 | Delay-lock loop and method adapting itself to operate over a wide frequency range | — | 2011-06-14 |
| 7948279 | Clock divider | — | 2011-05-24 |
| 7888991 | Clock distribution network | — | 2011-02-15 |
| 7876640 | Control voltage tracking circuits, methods for recording a control voltage for a clock synchronization circuit and methods for setting a voltage controlled delay | — | 2011-01-25 |
| 7812593 | Method for improving stability and lock time for synchronous circuits | J. Brian Johnson | 2010-10-12 |
| 7755404 | Delay locked loop circuit and method | — | 2010-07-13 |
| 7724049 | Multiphase generator with duty-cycle correction using dual-edge phase detection and method for generating a multiphase signal | Roman A. Royer | 2010-05-25 |
| 7688653 | Method and system for improved efficiency of synchronous mirror delays and delay locked loops | — | 2010-03-30 |
| 7660187 | Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM | James B. Johnson, Brent Keeth | 2010-02-09 |
| 7639090 | Phase detector for reducing noise | — | 2009-12-29 |
| 7619458 | Delay-lock loop and method adapting itself to operate over a wide frequency range | — | 2009-11-17 |