Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9165666 | Charge pump apparatus, a memory integrated circuit and methods of power supply | — | 2015-10-20 |
| 8082456 | Data controlled power supply apparatus | — | 2011-12-20 |
| 7424629 | Data controlled power supply apparatus | — | 2008-09-09 |
| 7240147 | Memory decoder and data bus for burst page read | — | 2007-07-03 |
| 7149143 | Decoder for memory data bus | — | 2006-12-12 |
| 7114084 | Data controlled programmable power supply | — | 2006-09-26 |
| 7095658 | Flash memory data bus for synchronous burst read page | — | 2006-08-22 |
| 7093062 | Flash memory data bus for synchronous burst read page | — | 2006-08-15 |
| 6949953 | Method and apparatus for providing a preselected voltage to test or repair a semiconductor device | — | 2005-09-27 |
| 6906965 | Temperature-compensated output buffer circuit | — | 2005-06-14 |
| 6900625 | Voltage converter system and method having a stable output voltage | Christophe J. Chevallier | 2005-05-31 |
| 6885589 | Synchronous up/down address generator for burst mode read | — | 2005-04-26 |
| 6842385 | Automatic reference voltage regulation in a memory device | Christophe J. Chevallier, Al Vahidimowlavi, Frankie F. Roohparvar | 2005-01-11 |
| 6822908 | Synchronous up/down address generator for burst mode read | — | 2004-11-23 |
| 6788037 | Voltage converter system and method having a stable output voltage | Christophe J. Chevallier | 2004-09-07 |
| 6765376 | Voltage converter system and method having a stable output voltage | Christophe J. Chevallier | 2004-07-20 |
| 6738298 | Automatic reference voltage regulation in a memory device | Christophe J. Chevallier, Al Vahidimowlavi, Frankie F. Roohparvar | 2004-05-18 |
| 6687165 | Temperature-compensated output buffer circuit | — | 2004-02-03 |
| 6593726 | Voltage converter system and method having a stable output voltage | Christophe J. Chevallier | 2003-07-15 |
| 5764586 | Intermediate size non-volatile electrically alterable semiconductor memory device | Radu Vanco, Gelu Voicu, Fred Leung | 1998-06-09 |
| 5355347 | Single transistor per cell EEPROM memory device with bit line sector page programming | — | 1994-10-11 |
| 5101379 | Apparatus for page mode programming of an EEPROM cell array with false loading protection | Tien-Ler Lin | 1992-03-31 |
| 4855955 | Three transistor high endurance EEPROM cell | — | 1989-08-08 |
| 4785424 | Apparatus for page mode programming of an EEPROM cell array with false loading protection | Tien-Ler Lin | 1988-11-15 |