PS

Peter Ramyalal Suaris

MG Mentor Graphics: 1 patents #345 of 698Top 50%
TL Tier Logic: 1 patents #3 of 4Top 75%
WC Wave Computing: 1 patents #7 of 18Top 40%
📍 Calabasas, CA: #540 of 4,119 inventorsTop 15%
🗺 California: #82,707 of 386,348 inventorsTop 25%
Overall (All Time): #728,943 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
10042966 Computing resource allocation based on flow graph translation Samit Chaudhuri, Henrik Esbensen, Kenneth Shiring 2018-08-07
RE45110 MPGA products based on a prototype FPGA Raminda Udaya Madurawe, Thomas H. White 2014-09-02
7716622 Memory re-implementation for field programmable gate arrays Lung-Tien Liu, Yuzheng Ding, Nan-Chi Chou 2010-05-11
7673273 MPGA products based on a prototype FPGA Raminda Udaya Madurawe, Thomas H. White 2010-03-02
7251803 Memory re-implementation for field programmable gate arrays Lung-Tien Liu, Yuzheng Ding, Nan-Chi Chou 2007-07-31
7203919 Retiming circuits using a cut-based approach Dongsheng Wang 2007-04-10
6223334 Automatic topology synthesis and optimization Ashok Vittal 2001-04-24