Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9785736 | Connectivity-aware layout data reduction for design verification | Yi-Ting Lee, Sridhar Srinivasan | 2017-10-10 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9785736 | Connectivity-aware layout data reduction for design verification | Yi-Ting Lee, Sridhar Srinivasan | 2017-10-10 |