AV

Arun Venkatachar

MG Mentor Graphics: 1 patents #345 of 698Top 50%
SY Synopsys: 1 patents #1,143 of 2,302Top 50%
Overall (All Time): #1,791,519 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12175191 Automated translation of design specifications of electronic circuits Ganapathy Parthasarathy, Saurav Nanda, Parivesh Choudhary, Pawan Patil 2024-12-24
6108494 Optimizing runtime communication processing between simulators Karl Eisenhofer, Kevin Nazareth, Peter Odryna, Robert M. Bradley 2000-08-22