RF

Richard D. Fiorentino

MT Marathon Technologies: 4 patents #6 of 20Top 30%
FC Fantastic Co.: 1 patents #4 of 18Top 25%
📍 Carlisle, MA: #87 of 364 inventorsTop 25%
🗺 Massachusetts: #12,758 of 88,656 inventorsTop 15%
Overall (All Time): #498,592 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
11316835 Systems and methods for securing communications Charles H. Kaman 2022-04-26
11290430 Systems and methods for securing communications Charles H. Kaman 2022-03-29
10063567 System for cross-host, multi-thread session alignment Charles H. Kaman, Mario Troiani, Erik Muench 2018-08-28
6453438 System and method for automatically rescheduling a data transmission to members of a group C. Kenneth Miller, Kenneth Cates, Alan Rosenberg 2002-09-17
6038685 Fault resilient/fault tolerant computing Thomas D. Bissett, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay +1 more 2000-03-14
5956474 Fault resilient/fault tolerant computing Thomas D. Bissett, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay +1 more 1999-09-21
5615403 Method for executing I/O request by I/O processor after receiving trapped memory address directed to I/O device from all processors concurrently executing same program Thomas D. Bissett, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay +1 more 1997-03-25
5600784 Fault resilient/fault tolerant computing Thomas D. Bissett, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay 1997-02-04
5157785 Process cell for an N-dimensional processor array having a single input element with 2N data inputs, memory, and full function arithmetic logic unit James H. Jackson, Ming-Chih Lee, Mark LaForest 1992-10-20
5133073 Processor array of N-dimensions which is physically reconfigurable into N-1 James H. Jackson, Ming-Chih Lee, Mark LaForest 1992-07-21