Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8443409 | System and method for channel selection for local broadcasting | Victor Odryna, Stephen D. Metzger, David J. Feng, Preston C. Shimer, Jeremy L. Mordkoff +2 more | 2013-05-14 |
| 6144714 | Programmable fractional frequency digital frequency synthesizer for synchronous residual time stamp service clock regenerator phase locked loop | Peter Chantiles | 2000-11-07 |
| 6128750 | Fail-over switching system | James W. Espy, Robert C. Solomon, Brian K. Bailey, Peter B. Everdell | 2000-10-03 |
| 6122337 | Modular circuitry architecture for residual time stamp service clock regenerator phase locked loop | Peter Chantiles | 2000-09-19 |
| 6011823 | Combined synchronous residual time stamp generator and service clock regenerator architecture | Peter Chantiles | 2000-01-04 |
| 5970107 | Synchronous residual time stamp service clock regenerator phase locked loop phase comparator and loop filter | Peter Chantiles | 1999-10-19 |
| 5922077 | Fail-over switching system | James W. Espy, Robert C. Solomon, Brian K. Bailey, Peter B. Everdell | 1999-07-13 |
| 5901151 | System for orthogonal signal multiplexing | Thomas B. Hawkins, James W. Espy | 1999-05-04 |
| 5890214 | Dynamically upgradeable disk array chassis and method for dynamically upgrading a data storage system utilizing a selectively switchable shunt | James W. Espy, Jeffrey A. Brown, Thomas B. Hawkins | 1999-03-30 |
| 5841997 | Apparatus for effecting port switching of fibre channel loops | Brian Gallagher | 1998-11-24 |
| 5768551 | Inter connected loop channel for reducing electrical signal jitter | Brian Gallagher | 1998-06-16 |
| 5243704 | Optimized interconnect networks | Kurt F. Baty, Charles J. Horvath, Richard Conrad Clemson, Kenneth T. Wolff | 1993-09-07 |