Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7773401 | Loading data with error detection in a power on sequence of flash memory device | Chi-Ling Chu, Chou-Ying Yang | 2010-08-10 |
| 7710784 | Method of reading the bits of nitride read-only memory cell | Chi-Ling Chu, Hsien-Wen Hsu | 2010-05-04 |
| 7652905 | Flash memory array architecture | Chi-Ling Chu, Chou-Ying Yang | 2010-01-26 |
| 7411833 | Nitride trapping memory device and method for reading the same | Chi-Ling Chu, Hsien-Wen Hsu | 2008-08-12 |
| 7394698 | Method and apparatus for adjusting a read reference level under dynamic power conditions | Chi-Ling Chu, Chou-Ying Yang | 2008-07-01 |
| 7379341 | Loading data with error detection in a power on sequence of flash memory device | Chi-Ling Chu, Chou-Ying Yang | 2008-05-27 |
| 7342844 | Power on sequence for a flash memory device | Chi-Ling Chu, Chou-Ying Yang | 2008-03-11 |
| 7310261 | Nitride read-only memory (NROM) device and method for reading the same | Chi-Ling Chu, Hsien-Wen Hsu | 2007-12-18 |
| 7262999 | System and method for preventing read margin degradation for a memory array | Hsien-Wen Hsu, Chi-Ling Chu | 2007-08-28 |