Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6452275 | Fabrication of integrated circuits with borderless vias | — | 2002-09-17 |
| 6403424 | Method for forming self-aligned mask read only memory by dual damascene trenches | Chung-Yeh Lee, Pei-Ren Jeng | 2002-06-11 |
| 6395607 | Integrated circuit fabrication method for self-aligned copper diffusion barrier | — | 2002-05-28 |
| 6383912 | Fabrication method of integrated circuits with multiple low dielectric-constant intermetal dielectrics | James Hao-An Chen Lin | 2002-05-07 |
| 6287955 | Integrated circuits with multiple low dielectric-constant inter-metal dielectrics | Shi-Qing Wang, James Hao-An Chen Lin | 2001-09-11 |
| 6097095 | Advanced fabrication method of integrated circuits with borderless vias and low dielectric-constant inter-metal dielectrics | — | 2000-08-01 |
| 6063702 | Global planarization method for inter level dielectric layers using IDL blocks | — | 2000-05-16 |
| 6037253 | Method for increasing interconnect packing density in integrated circuits | — | 2000-03-14 |
| 5858875 | Integrated circuits with borderless vias | Kevin Brown | 1999-01-12 |
| 5798299 | Interconnect structures for integrated circuits | — | 1998-08-25 |
| 5792707 | Global planarization method for inter level dielectric layers of integrated circuits | — | 1998-08-11 |
| 5759886 | Method for forming a layer of metal silicide over the gates of a surface-channel CMOS device | — | 1998-06-02 |
| 5757077 | Integrated circuits with borderless vias | Kevin Brown | 1998-05-26 |
| 5691572 | Interconnect structures for integrated circuits | — | 1997-11-25 |
| 5666007 | Interconnect structures for integrated circuits | — | 1997-09-09 |
| 5656543 | Fabrication of integrated circuits with borderless vias | — | 1997-08-12 |
| 5646070 | Method of forming conductive region on silicon semiconductor material, and silicon semiconductor device with such region | — | 1997-07-08 |
| 5571751 | Interconnect structures for integrated circuits | — | 1996-11-05 |
| 5352622 | Stacked capacitor with a thin film ceramic oxide layer | — | 1994-10-04 |
| 5094981 | Technique for manufacturing interconnections for a semiconductor device by annealing layers of titanium and a barrier material above 550.degree. C . | Tsui Y. Yao | 1992-03-10 |