Issued Patents All Time
Showing 51–75 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10490744 | Contact hole structure method for fabricating the same and applications thereof | Dai-Ying Lee, Po-Hao Tseng, Yu-Yu Lin, Kai-Chieh Hsu | 2019-11-26 |
| 10482953 | Multi-state memory device and method for adjusting memory state characteristics of the same | Yu-Hsuan Lin, Yu-Yu Lin, Chao Wang, Po-Hao Tseng, Kai-Chieh Hsu | 2019-11-19 |
| 10476002 | Method for thermally treating semiconductor structure before saving data | Yu-Yu Lin, Po-Hao Tseng, Kai-Chieh Hsu | 2019-11-12 |
| 10460444 | Memory device and operation method thereof | Yu-Yu Lin | 2019-10-29 |
| 10242737 | Device structure for neuromorphic computing system | Yu-Yu Lin | 2019-03-26 |
| 10157963 | Semiconductor device with memory structure | Dai-Ying Lee, Erh-Kun Lai | 2018-12-18 |
| 10141507 | Biased plasma oxidation method for rounding structure | Yu-Yu Lin | 2018-11-27 |
| 10115769 | Resistive random access memory device and method for manufacturing the same | Po-Hao Tseng, Yu-Yu Lin, Kai-Chieh Hsu | 2018-10-30 |
| 10103895 | Method for physically unclonable function-identification generation and apparatus of the same | Po-Hao Tseng, Yu-Yu Lin, Kai-Chieh Hsu | 2018-10-16 |
| 9959928 | Iterative method and apparatus to program a programmable resistance memory element using stabilizing pulses | Kai-Chieh Hsu, Yu-Yu Lin | 2018-05-01 |
| 9947403 | Method for operating non-volatile memory device and applications thereof | Yu-Yu Lin, Kai-Chieh Hsu | 2018-04-17 |
| 9947398 | Semiconductor memory device and operation method thereof | Yu-Hsuan Lin, Kai-Chieh Hsu, Yu-Yu Lin | 2018-04-17 |
| 9871198 | Method for manufacturing a resistive random access memory device | Yu-Yu Lin | 2018-01-16 |
| 9859336 | Semiconductor device including a memory cell structure | Po-Hao Tseng | 2018-01-02 |
| 9853215 | Resistance switching memory device and method of manufacturing the same | Po-Hao Tseng | 2017-12-26 |
| 9852791 | Semiconductor memory device, chip ID generation method thereof and manufacturing method thereof | Po-Hao Tseng, Ming-Hsiu Lee, Kai-Chieh Hsu, Yu-Yu Lin | 2017-12-26 |
| 9811689 | Chip ID generation using physical unclonable function | Po-Hao Tseng, Kai-Chieh Hsu, Yu-Yu Lin | 2017-11-07 |
| 9691478 | ReRAM array configuration for bipolar operation | Yu-Yu Lin | 2017-06-27 |
| 9666797 | Memory structure having material layer made from a transition metal on interlayer dielectric | Yu-Yu Lin | 2017-05-30 |
| 9583700 | RRAM process with roughness tuning technology | Yu-Yu Lin, Dai-Ying Lee | 2017-02-28 |
| 9514815 | Verify scheme for ReRAM | Yu-Yu Lin | 2016-12-06 |
| 9515258 | Memory structure and manufacturing method of the same | Yu-Yu Lin, Chien-Hung Lu, Chin-Yi Tseng | 2016-12-06 |
| 9466792 | Memory device and method for fabricating the same | Yu-Yu Lin | 2016-10-11 |
| 9455402 | Resistive memory device with ring-shaped metal oxide on top surfaces of ring-shaped metal layer and barrier layer | Yu-Yu Lin, Kuang-Hao Chiang, Ming-Hsiu Lee | 2016-09-27 |
| 9455403 | Semiconductor structure and method for manufacturing the same | Erh-Kun Lai, Yu-Yu Lin, Dai-Ying Lee | 2016-09-27 |