Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8336012 | Automated timing optimization | Michael Minter | 2012-12-18 |
| 8166428 | Synthesized logic replacement | — | 2012-04-24 |
| 8001497 | Control signal source replication | Balamurugan Balasubramanian, Kavitha Chaturvedula | 2011-08-16 |
| 7415687 | Method and computer program for incremental placement and routing with nested shells | Juergen Lahner, Balamurugan Balasubramanian | 2008-08-19 |
| 7380228 | Method of associating timing violations with critical structures in an integrated circuit design | Gregory Pierce, Juergen Lahner | 2008-05-27 |
| 7082584 | Automated analysis of RTL code containing ASIC vendor rules | Juergen Lahner, Kiran Atmakuri, Kavitha Chaturvedula, Balamurugan Balasubramanian, Krishna Devineni +2 more | 2006-07-25 |