RB

Randall Bach

Lsi Logic: 8 patents #212 of 1,957Top 15%
ES Eta Systems: 3 patents #1 of 11Top 10%
Overall (All Time): #470,577 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7106073 Method and system for area efficient charge-based capacitance measurement Jeffrey S. Sather 2006-09-12
6544807 Process monitor with statistically selected ring oscillator 2003-04-08
6493851 Method and apparatus for indentifying causes of poor silicon-to-simulation correlation Robert W. Davis 2002-12-10
6114903 Layout architecture for core I/O buffer 2000-09-05
5843813 I/O driver design for simultaneous switching noise minimization and ESD performance enhancement Hua Wei, Michael J. Colwell 1998-12-01
5751161 Update scheme for impedance controlled I/O buffers Shuran Wei 1998-05-12
5654895 Process monitor usig impedance controlled I/O controller Shuran Wei 1997-08-05
5592104 Output buffer having transmission gate and isolated supply terminals 1997-01-07
4769558 Integrated circuit clock bus layout delay system 1988-09-06
4760292 Temperature compensated output buffer 1988-07-26
4701920 Built-in self-test system for VLSI circuit chips David R. Resnick 1987-10-20