GS

Gina M. Sparacino

Lsi Logic: 3 patents #574 of 1,957Top 30%
📍 Milpitas, CA: #1,297 of 3,192 inventorsTop 45%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,637,019 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
5815360 Integrated circuit input/output ESD protection circuit with gate voltage regulation and parasitic zener and junction diode Rosario Consiglio 1998-09-29
5707886 Process for providing electrostatic discharge protection to an integrated circuit output pad Rosario Consiglio 1998-01-13
5594611 Integrated circuit input/output ESD protection circuit with gate voltage regulation and parasitic zener and junction diode Rosario Consiglio 1997-01-14