DW

Deborah Chao Wang

Lsi Logic: 2 patents #799 of 1,957Top 45%
📍 San Jose, CA: #17,604 of 32,062 inventorsTop 55%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #2,262,617 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
5784289 Method for estimating routability and congestion in a cell placement fo integrated circuit chip — 1998-07-21
5587923 Method for estimating routability and congestion in a cell placement for integrated circuit chip — 1996-12-24