Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12164856 | Topological simulation of layout design | — | 2024-12-10 |
| 11011471 | Semiconductor device | Michio Inoue | 2021-05-18 |
| 10504846 | Semiconductor device | Michio Inoue | 2019-12-10 |
| 9911699 | Semiconductor device | Michio Inoue | 2018-03-06 |
| 9570378 | Semiconductor device including dummy pattern | — | 2017-02-14 |
| 9508650 | Semiconductor device with layout of wiring layer and dummy patterns | Michio Inoue | 2016-11-29 |
| 9502354 | Semiconductor device with layout of wiring layer and dummy patterns | Michio Inoue | 2016-11-22 |
| 9136203 | Semiconductor device and manufacturing method thereof | Kazuteru Ishizuka | 2015-09-15 |
| 8895408 | Semiconductor device | Michio Inoue | 2014-11-25 |
| 8756560 | Method for designing dummy pattern, exposure mask, semiconductor device, method for semiconductor device, and storage medium | — | 2014-06-17 |
| 8736063 | Semiconductor device and manufacturing method thereof | Kazuteru Ishizuka | 2014-05-27 |
| 8502384 | Semiconductor device and manufacturing method thereof | Kazuteru Ishizuka | 2013-08-06 |
| 8349709 | Method of layout of pattern | Michio Inoue | 2013-01-08 |
| 8073661 | Shape prediction simulator, method and program | — | 2011-12-06 |