Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11482189 | Information processing apparatus and control method | Minori Takao | 2022-10-25 |
| 11281265 | Electronic device with reduced chassis thickness | Kenji Watamura, Jun Kaminaga | 2022-03-22 |
| 11061291 | Electronic apparatus | Moriyuki Tsuchihashi, Kazuo Fujii | 2021-07-13 |
| 11058008 | PCB panel, PCB, and manufacturing method | Seiji Yamasaki, Hua Wang, Yanping Zhou | 2021-07-06 |
| 10938480 | Electronic apparatus having multiple transceivers | Masayuki Amano, Tabito Miyamoto, Masato Itoh | 2021-03-02 |
| 10892575 | Electronic component, electronic device, and electronic substrate | Jun Kaminaga, Kenji Watamura | 2021-01-12 |
| 10884690 | Dual screen device having power state indicators | Yasumichi Tsukamoto | 2021-01-05 |
| 10187976 | Flexible printer circuit board | Hideshi Tsukamoto, Yasushi Yoshikawa, Mitsuru Ogawa | 2019-01-22 |
| 10181662 | Switching device having a push button | Yoshio Nakamura, Seiji Yamasaki, Osamu Yamamoto, Takaaki Okada | 2019-01-15 |
| 7817093 | Portable computer and antenna distance setting mechanism | Hiroaki Agata, Mitsuo Horiuchi, Shigeki Mori, Tetsuya Ohtani, Osamu Yamamoto | 2010-10-19 |
| 7254727 | Information processor with suppressed cache coherence in low power mode | Noritoshi Yoshiyama, Seiichi Kawano, Tetsuji Nakamura | 2007-08-07 |
| 6924442 | Electronic input apparatus and method thereof | Masayoshi Nakano, Takayuki Akai | 2005-08-02 |
| 6778930 | System for reducing distortion of signals transmitted over a bus | Takashi Sugawara | 2004-08-17 |
| 6728822 | Bus bridge circuit, information processing system and cardbus controller | Takashi Sugawara, Hidenobu Hanami | 2004-04-27 |
| 6663430 | Connector, connector connection structure and electronic equipment | Hideyuki Usui, Masayoshi Nakano | 2003-12-16 |
| 6339831 | Automatic detecting unit for diagnosing a connection and identifying an external device, information processing apparatus, and external device | Takashi Sugawara | 2002-01-15 |
| 5404471 | Method and apparatus for switching address generation modes in CPU having plural address generation modes | Seiichi Kawano, Shuichi Mukohyama | 1995-04-04 |