Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9865350 | Content addressable memory, an index generator, and a registered information update method | — | 2018-01-09 |
| 8719549 | Device to reconfigure multi-level logic networks, method to reconfigure multi-level logic networks, device to modify logic networks, and reconfigurable multi-level logic network | — | 2014-05-06 |
| 8352677 | Associative memory | — | 2013-01-08 |
| 8285922 | Address generator using LUT cascade logic network | — | 2012-10-09 |
| 7844924 | Device for reducing the width of graph and a method to reduce the width of graph, and a device for logic synthesis and a method for logic synthesis | Yukihiro Iguchi | 2010-11-30 |
| 7486109 | Programmable logic device | Yukihiro Iguchi | 2009-02-03 |