Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9614749 | Data processing system and method for changing a transmission table | Bup Joong Kim, Tae Kyu Kang, Jong Hyun Lee | 2017-04-04 |
| 9490926 | Processor time synchronization apparatus and method in data communication system with multiple processors and line interfaces | Bup Joong Kim, Tae Sik Cheung, Jong Hyun Lee | 2016-11-08 |
| 9160563 | Failure recovery method in non revertive mode of Ethernet ring network | Jeong-dong RYOO, June-Koo Rhee, Jin-Sung Im, Zahir Uddin Ahmad, Yang Yang +1 more | 2015-10-13 |
| 8797845 | Failure recovery method in non revertive mode of ethernet ring network | Jeong-dong RYOO, June-Koo Rhee, Jin-Sung Im, Zahir Uddin Ahmad, Yang Yang +1 more | 2014-08-05 |
| 7944841 | Method and apparatus for transmitting error information between ethernet network and synchronous digital hierarchy network | Ji Wook YOUN, Jung Sik Kim | 2011-05-17 |
| 7940645 | Protection switching method based on change in link status in ethernet link aggregation sublayer | Dae Ub KIM, Jeong-dong RYOO, Young Sun Kim | 2011-05-10 |
| 7623593 | Data receiving apparatus capable of compensating for reduced timing margin caused by inter-symbol interference and method thereof | Tae Sik Cheung, Dae Ub KIM, Hae Won Jung | 2009-11-24 |
| 7508838 | Ethernet port apparatus supporting multiple physical media, media managing method therefor, and switching system using the same | Dae Ub KIM, Tae Sik Cheung, Hae Won Jung | 2009-03-24 |
| 7496115 | Apparatus for multiplexing Gigabit Ethernet frame and apparatus for demultiplexing 10-Gigabit Ethernet frame | Chang Ho Choi, Do Yeon Kim, Hae Won Jung | 2009-02-24 |
| 7450525 | Method for discovering topology in Ethernet network | Myung-Hee Son, Hae Won Jung | 2008-11-11 |
| 7308062 | Apparatus for providing system clock synchronized to a network universally | Jae Jeong Lee, Hae Won Jung, Young Sun Kim | 2007-12-11 |
| 7185134 | Apparatus for managing Ethernet physical layer registers using external bus interface and method thereof | Daeub KIM, Hae Won Jung, Hyeong Ho Lee | 2007-02-27 |
| 5594762 | Apparatus for retiming digital data transmitted at a high speed | Bhum Cheol Lee, Jung Sik Kim, Seok Youl Kang | 1997-01-14 |
| 5525935 | High-speed bit synchronizer with multi-stage control structure | Bheom C. Lee, Kwon C. Park, Seok Youl Kang | 1996-06-11 |