Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8392641 | Microcontroller with an interrupt structure having programmable priority levels with each priority level associated with a different register set | Pankaj Shrivastava, Ata Khan, Zhimin Ding, Craig A. MacKenna | 2013-03-05 |
| 8341382 | Memory accelerator buffer replacement method and system | Craig A. MacKenna, Rick Varney | 2012-12-25 |
| 7305543 | Memory organization allowing single cycle pointer addressing where the address of the pointer is also contained in one of the memory locations | Ata Khan, Zhimin Ding | 2007-12-04 |
| 7290119 | Memory accelerator with two instruction set fetch path to prefetch second set while executing first set of number of instructions in access delay to instruction cycle ratio | Ata Khan, John H. Wharton, Robert M. Kallal | 2007-10-30 |
| 6799264 | Memory accelerator for ARM processor pre-fetching multiple instructions from cyclically sequential memory partitions | Ata Khan, John H. Wharton, Robert M. Kallal | 2004-09-28 |
| 6658553 | Universal pointer implementation scheme for uniformly addressing distinct memory spaces in a processor's address space | Zhimin Ding, Ata Khan | 2003-12-02 |
| 6643755 | Cyclically sequential memory prefetch | Ata Khan, John H. Wharton | 2003-11-04 |
| 6526463 | Dynamically selectable stack frame size for processor interrupts | Zhimin Ding, Ata Khan | 2003-02-25 |
| 5787299 | Pin selection system for microcontroller having multiplexer selects between address/data signals and special signals produced by special function device | Farrell L. Ostler, Ata Khan | 1998-07-28 |
| 5655135 | System for write protecting a bit that is hardware modified during a read-modify-write cycle | Kevin A. Sholander, Neil Edward Birns, Farrell L. Ostler, Santanu Roy | 1997-08-05 |
| 5619663 | Computer instruction prefetch system | Ori K. Mizrahi-Shalom, Farrell L. Ostler | 1997-04-08 |
| 5594913 | High speed memory access system for a microcontroller with directly driven low order address bits | Farrell L. Ostler, Ori K. Mizrahi-Shalom | 1997-01-14 |
| 4905137 | Data bus control of ROM units in information processing system | William Joshua Price, Ronald L. Treadway, Brian M. Willis | 1990-02-27 |