Issued Patents All Time
Showing 76–89 of 89 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8837467 | Multi-rate serializer/deserializer circuit with broad operating frequency range | Xiaoshu Zhao | 2014-09-16 |
| 8811526 | Delta modulated low power EHF communication link | Gary D. McCormack | 2014-08-19 |
| 8804892 | Frequency and phase acquisition of a clock and data recovery circuit without an external reference clock | — | 2014-08-12 |
| 8757501 | Scalable high-bandwidth connectivity | Gary D. McCormack | 2014-06-24 |
| 8714459 | Scalable high-bandwidth connectivity | Gary D. McCormack | 2014-05-06 |
| 8416902 | Clock and data recovery for burst-mode serial signals | Eugene Pahomsky | 2013-04-09 |
| 8284888 | Frequency and phase acquisition of a clock and data recovery circuit without an external reference clock | — | 2012-10-09 |
| 7236084 | Crosspoint switch with switch matrix module | Gary D. McCormack, Angus J. McCamant, Norbert Seitz, Richard R. Suter | 2007-06-26 |
| 6946948 | Crosspoint switch with switch matrix module | Gary D. McCormack, Angus J. McCamant, Norbert Seitz, Richard R. Suter | 2005-09-20 |
| 6559682 | Dual-mixer loss of signal detection circuit | Tao Xiang | 2003-05-06 |
| 6215835 | Dual-loop clock and data recovery for serial data communication | — | 2001-04-10 |
| 6178213 | Adaptive data recovery system and methods | Gary D. McCormack, Ronald F. Talaga, Jr., Angus J. McCamant | 2001-01-23 |
| 6028462 | Tunable delay for very high speed | — | 2000-02-22 |
| 6008680 | Continuously adjustable delay-locked loop | Jean-Marc G. Patenaude | 1999-12-28 |