Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9256495 | Processing unit and error processing method | Toru Sano | 2016-02-09 |
| 8934736 | Image processing apparatus, image processing system, and method for having computer process image | Yasuki Tanabe, Katsuyuki Kimura | 2015-01-13 |
| 8730250 | Image processor and command processing method | Yasuki Tanabe, Shunichi Ishiwata, Katsuyuki Kimura, Takahisa Wada, Keiri Nakanishi +2 more | 2014-05-20 |
| 8417063 | Image processing apparatus and image processing system | Yasuki Tanabe, Yasukazu Okamoto, Tsuyoshi Nakano, Katsuyuki Kimura | 2013-04-09 |
| 8413123 | Compiling device and compiling method | Yasuki Tanabe, Shunichi Ishiwata, Katsuyuki Kimura, Keiri Nakanishi, Masato Sumiyoshi +1 more | 2013-04-02 |
| 8345113 | Image processing apparatus and image processing system | Keiri Nakanishi, Shunichi Ishiwata, Katsuyuki Kimura, Takahisa Wada, Masato Sumiyoshi +2 more | 2013-01-01 |
| 8176290 | Memory controller | Takahisa Wada, Katsuyuki Kimura, Shunichi Ishiwata, Ryuji Hada, Keiri Nakanishi +2 more | 2012-05-08 |
| 7343475 | Supplying halt signal to data processing unit from integer unit upon single unit format instruction in system capable of executing double unit format instruction | — | 2008-03-11 |
| 7308320 | Processor core for using external extended arithmetic unit efficiently and processor incorporating the same | — | 2007-12-11 |
| 7096344 | Processor for improving instruction utilization using multiple parallel processors and computer system equipped with the processor | — | 2006-08-22 |
| 6978359 | Microprocessor and method of aligning unaligned data loaded from memory using a set shift amount register instruction | — | 2005-12-20 |
| 6918058 | Semiconductor integrated circuit, system board and debugging system | Takashi Miura | 2005-07-12 |
| 6832117 | Processor core for using external extended arithmetic unit efficiently and processor incorporating the same | — | 2004-12-14 |
| 6675290 | Processor for improving instruction utilization using multiple parallel processors and computer system equipped with the processor | — | 2004-01-06 |
| 5978937 | Microprocessor and debug system | Tatsuo Yano | 1999-11-02 |
| 5943498 | Microprocessor, method for transmitting signals between the microprocessor and debugging tools, and method for tracing | Tatsuo Yano | 1999-08-24 |
| 5594923 | Direct memory access controller comprising a multi-word data register for high speed continuous data transfer | Satoshi Inoue | 1997-01-14 |
| 5524259 | Processor system having an external arithmetic device for high speed execution of computation of data | Miho Koga | 1996-06-04 |
| 5410708 | Multi-register interrupt controller with multiple interrupt detection capability | — | 1995-04-25 |
| 5404481 | DMA controller comprising bus switching means for connecting data bus signals with other data bus signals without process or intervention | — | 1995-04-04 |
| 5295248 | Branch control circuit | — | 1994-03-15 |
| 5133056 | Interrupt controller | — | 1992-07-21 |