Issued Patents All Time
Showing 51–75 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9003128 | Cache system and processing apparatus | Kumiko Nomura, Keiko Abe | 2015-04-07 |
| 8912822 | Semiconductor integrated circuit | Shinichi Yasuda, Masato Oda | 2014-12-16 |
| 8856199 | Random number generator circuit and cryptographic circuit | Tetsufumi Tanamoto, Mari Matsumoto, Kazutaka Ikegami | 2014-10-07 |
| 8824199 | Magnetic random access memory and memory system | Hiroki Noguchi, Keiko Abe, Kumiko Nomura, Kazutaka Ikegami | 2014-09-02 |
| 8742810 | PLL (phase-locked loop) | Hiroki Noguchi, Keiko Abe, Shinichi Yasuda | 2014-06-03 |
| 8724403 | Cache system and information-processing device | Kumiko Nomura, Keiko Abe, Kazutaka Ikegami, Hiroki Noguchi | 2014-05-13 |
| 8716805 | CMOS integrated circuits with bonded layers containing functional electronic devices | — | 2014-05-06 |
| 8680887 | Nonvolatile configuration memory | Keiko Abe, Shinichi Yasuda, Kumiko Nomura | 2014-03-25 |
| 8610196 | Memory including transistors with double floating gate structures | Tetsufumi Tanamoto, Kosuke Tatsumura, Kiwamu Sakuma, Atsuhiro Kinoshita, Koichi Muraoka | 2013-12-17 |
| 8611143 | Memory circuit using spin MOSFETs, path transistor circuit with memory function, switching box circuit, switching block circuit, and field programmable gate array | Hideyuki Sugiyama, Masato Oda, Tetsufumi Tanamoto, Mizue Ishikawa, Takao Marukame +2 more | 2013-12-17 |
| 8581414 | Method of manufacturing three-dimensional integrated circuit and three-dimensional integrated circuit apparatus | — | 2013-11-12 |
| 8578318 | Method for implementing circuit design for integrated circuit and computer readable medium | Kumiko Nomura, Shinichi Yasuda, Keiko Abe, Tetsufumi Tanamoto, Kazutaka Ikegami +1 more | 2013-11-05 |
| 8553464 | Nonvolatile programmable logic switch | Yoshifumi Nishi, Daisuke Hagishima, Shinichi Yasuda, Tetsufumi Tanamoto, Takahiro Kurita +1 more | 2013-10-08 |
| 8497732 | Three-dimensional semiconductor integrated circuit | Shinichi Yasuda, Keiko Abe | 2013-07-30 |
| 8450625 | Switch device and circuit including switch device | — | 2013-05-28 |
| 8437187 | Semiconductor integrated circuit including memory cells having non-volatile memories and switching elements | Shinichi Yasuda, Masato Oda, Kumiko Nomura, Keiko Abe | 2013-05-07 |
| 8330160 | Random number generating device | Tetsufumi Tanamoto | 2012-12-11 |
| 8331130 | Semiconductor integrated circuit | Shinichi Yasuda, Keiko Abe | 2012-12-11 |
| 8307022 | Random number generating device | Mari Matsumoto, Ryuji Ohba, Shinichi Yasuda | 2012-11-06 |
| 8243498 | Semiconductor integrated circuit | Keiko Abe | 2012-08-14 |
| 8239809 | 3-dimensional integrated circuit designing method | — | 2012-08-07 |
| 8073889 | Seed generating circuit, random number generating circuit, semiconductor integrated circuit, IC card, and information terminal equipment | Tetsuro Iwamura | 2011-12-06 |
| 8039890 | Random number generating device | Mari Matsumoto, Ryuji Ohba | 2011-10-18 |
| 7949984 | Method and apparatus for designing a three-dimensional integrated circuit | Tetsufumi Tanamoto, Shinichi Yasuda | 2011-05-24 |
| 7917560 | Random number test circuit | Mari Matsumoto, Tetsufumi Tanamoto | 2011-03-29 |