Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5787034 | Nonvolatile semiconductor memory having a stress relaxing voltage applied to erase gate during data write | Tadashi Miyakawa, Masamichi Asano | 1998-07-28 |
| 5636160 | Nonvolatile semiconductor memory having a stress relaxing voltage applied to erase gate during data write | Tadashi Miyakawa, Masamichi Asano | 1997-06-03 |