Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4896056 | Semiconductor IC including circuit for preventing erroneous operation caused by power source noise | Tadahiro Fujii | 1990-01-23 |
| 4716308 | MOS pull-up or pull-down logic circuit having equalized discharge time delays and layout avoiding crossovers | Kenji Matsuo, Itsuo Sasaki, Hiroaki Suzuki | 1987-12-29 |