MO

Masaki Oiso

KT Kabushiki Kaisha Toshiba: 2 patents #9,982 of 21,451Top 50%
Overall (All Time): #2,155,272 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
7188288 Semiconductor LSI circuit with scan circuit, scan circuit system, scanning test system and method 2007-03-06
7139952 Semiconductor integrated circuit detecting glitch noise and test method of the same Takashi Matsumoto 2006-11-21