Eric M. Verwillow — 7 Patents at Juniper Networks

Eric M. Verwillow has been granted 7 US patents while listed as an inventor at Juniper Networks. The first was granted in 2005 and the most recent in September 2024. Eric M. Verwillow ranks #680,018 of 4,157,543 US inventors in our database (top 16.4%). Patent records list Eric M. Verwillow in Palo Alto, CA, US.

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Showing 1–7 of 7 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12087382	Adaptive threshold for bad flash memory blocks	Matthew D. Fleming, John Roper, Hari Kannan, John Boyle, Nenad Miladinovic +1 more	2024-09-10	$12,576,000
8923301	Fixed latency priority classifier for network data	Jean-Marc Frailong, Avanindra Godbole	2014-12-30	$10,973,000
8681795	Fixed latency priority classifier for network data	Jean-Marc Frailong, Avanindra Godbole	2014-03-25	$13,132,000
7986717	System, apparatus, and method for increasing resiliency in communications	Dennis C. Ferguson, Devereaux C. Chen, Ramesh Padmanabhan, Thomas Michael Skibo	2011-07-26	$16,038,000
7570667	System, apparatus, and method for increasing resiliency in communications	Dennis C. Ferguson, Devereaux C. Chen, Ramesh Padmanabhan, Thomas Michael Skibo	2009-08-04	$28,266,000
7099352	System, apparatus, and method for increasing resiliency in communications	Dennis C. Ferguson, Devereaux C. Chen, Ramesh Padmanabhan, Thomas Michael Skibo	2006-08-29	$39,918,000
6907541	System for recovering received data with a reliable gapped clock signal after reading the data from memory using enable and local clock signals	Ramesh Padmanabhan, Pradeep Sindhu	2005-06-14	$58,875,000

Eric M. Verwillow — 7 Patents

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