Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9667390 | Time-domain mechanism for computing error vector magnitude of OFDM signals | Craig E. Rupp, Ramanujeya Lakshminarayan Narahari | 2017-05-30 |
| 9332450 | Unit testing and analysis of multiple UUTs | Craig E. Rupp, Gerardo Orozco Valdes, Vijaya Yajnanarayana | 2016-05-03 |
| 8984342 | Unit testing and analysis using a stored reference signal | Craig E. Rupp, Gerardo Orozco Valdes, Vijaya Yajnanarayana | 2015-03-17 |
| 8934595 | Estimation of sample clock frequency offset based on error vector magnitude | Krishna Bharadwaj, Ramesh Krishnan, Vijaya Yajnanarayana | 2015-01-13 |
| 8891695 | Maximizing the viterbi winning path metric to estimate carrier phase offset in continuous phase modulated signals | Vijaya Yajnanarayana | 2014-11-18 |
| 8891694 | Maximizing the viterbi winning path metric to estimate carrier frequency and phase offsets in continuous phase modulated signals | Vijaya Yajnanarayana | 2014-11-18 |
| 8654903 | Using error vector magnitude to estimate sample clock frequency offset | Krishna Bharadwaj, Ramesh Krishnan, Vijaya Yajnanarayana | 2014-02-18 |
| 8442161 | Estimation of sample clock frequency offset using error vector magnitude | Krishna Bharadwaj, Ramesh Krishnan, Vijaya Yajnanarayana | 2013-05-14 |