Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10102132 | Data transfer in a multiprocessor using a shared cache memory | Hiroaki Sakaguchi, Hiroshi Yoshikawa, Masaaki Ishii | 2018-10-16 |
| 9747211 | Cache memory, cache memory control unit, and method of controlling the cache memory | — | 2017-08-29 |
| 9535841 | Cache memory and cache memory control unit | Hiroaki Sakaguchi, Hiroshi Yoshikawa, Masaaki Ishii | 2017-01-03 |
| 9336148 | Cache memory, cache memory control unit, and method of controlling the cache memory | — | 2016-05-10 |
| 8650385 | Instruction fetch apparatus, processor and program counter addition control method | Hitoshi Kai, Hiroaki Sakaguchi, Hiroshi Kobayashi, Katsuhiko Metsugi, Haruhisa Yamamoto +2 more | 2014-02-11 |