SS

Surender Singh

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
Overall (All Time): #1,906,704 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10643020 System and method to estimate a number of layers needed for routing a multi-die package Taranjit Singh Kukal, Jitin Jacob, Navkamal Rakra 2020-05-05
9454634 Methods, systems, and computer program product for an integrated circuit package design estimator Taranjit Singh Kukal, Avinash Singh 2016-09-27