Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8135057 | Reconfigurable chip level equalizer architecture | Antonio F. Mondragon-Torres, Timothy M. Schmidl, Gibong Jeong, Aris Papasakellariou, Anand G. Dabak +1 more | 2012-03-13 |
| 7561618 | Reconfigurable chip level equalizer architecture for multiple antenna systems | Antonio F. Mondragon-Torres, Timothy M. Schmidl, Aris Papasakellariou, Anand G. Dabak, Eko Onggosanusi +1 more | 2009-07-14 |
| 6633615 | Trellis transition-probability calculation with threshold normalization | Xiao-an Wang | 2003-10-14 |
| 6614858 | Limiting range of extrinsic information for iterative decoding | Xiao-an Wang | 2003-09-02 |
| 6549998 | Address generator for interleaving data | Xiao-an Wang | 2003-04-15 |
| 5663677 | Integrated circuit multi-level interconnection technique | Ronald L. Freyman, Ted R. E. Martin | 1997-09-02 |
| 4562538 | Microprocessor having decision pointer to process restore position | Alan D. Berenbaum, Anand Jagannathan, John J. Molinelli | 1985-12-31 |
| 4484274 | Computer system with improved process switch routine | Alan D. Berenbaum, Anand Jagannathan, John J. Molinelli | 1984-11-20 |